Espressif Systems /ESP32-S3 /SENSITIVE /CLOCK_GATE

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Interpret as CLOCK_GATE

31282724232019161512118743000000000000000000000000000000000000000000 (REG_CLK_EN)REG_CLK_EN

Description

Sensitive module clock gate configuration register.

Fields

REG_CLK_EN

Set 1 to enable clock gate function.

Links

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